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MIT scientists develop transistor with nanosecond switching and billion-cycle durability
(www.techspot.com)
this post was submitted on 31 Jul 2024
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Does it mean it lasts 100 seconds under 1GHz? I'm missing something, it doesn't sound much if it's supposed to be used as RAM.
The article seems to omit some data from the original post on MIT's site. They did 100 billion switches with no / negligible signs of degradation. In the it paper they mention an endurance potential on par of that of state of the art FeFET devices. I couldn't find a link to the paper freely available, but it seems to be a noteworthy achievement as the sliders only move a few atoms width per switch.
MIT
Research Article
Oh that's a lot more meaningful. It's so disappointing reading news on topics I understand instead of root sources. I always wonder how I am being mislead in things I don't know well.
I also wonder what happens after 100 billion switches since that's such a trivial number.
Well from what I could find it suggests around 10+ years of usage. Not only is it long lasting, but it's incredibly thin meaning far more transistors can be stored in one location. To top it off with that level of movement it could substation ally cut down on power usage. While it probably will mean the big companies will simply scale up in terms of capacity and their power usage will remain the same. It also mean in years to come when it hits the consumer level we could have phones and computers that overheat less and have a better battery life.
The "nanosecond switching" isn't really impressive either, since it wouldn't be able to keep up with a 1 GHz clock because RTL involves signals passing through several gates (and each gate is made up of multiple transistors unless it's a not gate) each cycle, so if each of those take a nanosecond, that limits the clock rate to 1 / number of transistors GHz, which it also wouldn't be able to hit because signals also take time to travel along the wires between transistors.
For 5 GHz, signals must make it from one register, through all of the logic, and latch properly into the next register in 0.2 ns.